Ettus Research Blog

Introduction

Ettus Research has released the QR210 Quadradio.  This is a high-performance, four-channel receiver that can be used to build coherent systems with up to 32 channels.  Here’s an introduction:

Receiver Architecture

The QR210 includes four, independent receivers that are driven by a common local oscillator, internal calibration source, and ADC sample clock.  Each receiver contains a pre-select filter bank for high out-of-band rejection, a direct-conversion receiver, and a 16-bit, 120 MS/s ADC.  A Virtex-5 FPGA provides significant DSP resources for operations such as digital downconversion, filtering, or beamforming.  It also handles configuration and I/O from host interfaces.  For more information about the QR210 Architecture, please see this page.

GNU Radio Integration and Open FPGA

Like the other products of the USRP™ (Universal Software Radio Peripheral) family, the QR210 can be configured and will stream received I/Q samples through a simple C++ API.  Ettus Research has also developed GNU Radio blocks that integrate that expose this functionality to GNU Radio Companion and Python.

The QR210 FPGA design is open to users that require custom DSP functionality.

Building Scalable Coherent Receivers

While a single QR210 can meet the needs of many demanding applications, it is also possible to expand a QR210-based system up to 32 channels.  Increasing the channel count increases accuracy and precision for beamforming or direction finding applications.  In combination with off-the-shelf equipment, and the Ettus Research SuperMIMO Hub (S-MIMO), it is relatively straight forward to build these large systems.  For more information, please see this document. 

Related Documents

Link: Overview of QR210 Architecture
Link: Building 32-Channel Coherenet Receiver with QR210
Link: QR210 Product Page